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  • NVIDIA DRIVE OS Linux SDK API Reference

    6.0.10.0 Release
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    NvSIPLCapStructs.h
    Go to the documentation of this file.
    1 /*
    2  * SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
    3  * SPDX-License-Identifier: LicenseRef-NvidiaProprietary
    4  *
    5  * NVIDIA CORPORATION, its affiliates and licensors retain all intellectual
    6  * property and proprietary rights in and to this material, related
    7  * documentation and any modifications thereto. Any use, reproduction,
    8  * disclosure or distribution of this material and related documentation
    9  * without an express license agreement from NVIDIA CORPORATION or
    10  * its affiliates is strictly prohibited.
    11  */
    12 
    13 #ifndef NVSIPL_CAP_STRUCTS_H
    14 #define NVSIPL_CAP_STRUCTS_H
    15 
    16 #ifdef __cplusplus
    17 extern "C" {
    18 #endif /* __cplusplus */
    19 
    35 typedef enum {
    60 #if (NV_IS_SAFETY == 0)
    61 
    77 #endif
    80 
    84 typedef enum {
    129 
    133 typedef enum {
    147 
    151 typedef enum {
    157 
    159 #define NVSIPL_CAP_MIN_IMAGE_WIDTH 640U
    160 
    162 #define NVSIPL_CAP_MAX_IMAGE_WIDTH 3848U
    163 
    165 #define NVSIPL_CAP_MIN_IMAGE_HEIGHT 480U
    166 
    168 #define NVSIPL_CAP_MAX_IMAGE_HEIGHT 2168U
    169 
    171 #define NVSIPL_CAP_MIN_FRAME_RATE 10U
    172 
    174 #define NVSIPL_CAP_MAX_FRAME_RATE 60U
    175 
    179 #define NVSIPL_PIXEL_ORDER_LUMA (0x00000001U)
    180 
    181 #define NVSIPL_PIXEL_ORDER_YUV (0x00000002U)
    182 
    183 #define NVSIPL_PIXEL_ORDER_YVU (0x00000003U)
    184 
    185 #define NVSIPL_PIXEL_ORDER_YUYV (0x00000004U)
    186 
    187 #define NVSIPL_PIXEL_ORDER_YVYU (0x00000005U)
    188 
    189 #define NVSIPL_PIXEL_ORDER_VYUY (0x00000006U)
    190 
    191 #define NVSIPL_PIXEL_ORDER_UYVY (0x00000007U)
    192 
    193 #define NVSIPL_PIXEL_ORDER_XUYV (0x00000008U)
    194 
    195 #define NVSIPL_PIXEL_ORDER_XYUV (0x00000009U)
    196 
    197 #define NVSIPL_PIXEL_ORDER_VUYX (0x0000000AU)
    198 
    201 #define NVSIPL_PIXEL_ORDER_ALPHA (0x00000011U)
    202 
    203 #define NVSIPL_PIXEL_ORDER_RGBA (0x00000012U)
    204 
    205 #define NVSIPL_PIXEL_ORDER_ARGB (0x00000013U)
    206 
    207 #define NVSIPL_PIXEL_ORDER_BGRA (0x00000014U)
    208 
    209 #define NVSIPL_PIXEL_ORDER_RG (0x00000015U)
    210 
    213 #define NVSIPL_PIXEL_ORDER_RGGB (0x00000021U)
    214 
    215 #define NVSIPL_PIXEL_ORDER_BGGR (0x00000022U)
    216 
    217 #define NVSIPL_PIXEL_ORDER_GRBG (0x00000023U)
    218 
    219 #define NVSIPL_PIXEL_ORDER_GBRG (0x00000024U)
    220 
    222 #define NVSIPL_PIXEL_ORDER_RCCB (0x00000025U)
    223 
    224 #define NVSIPL_PIXEL_ORDER_BCCR (0x00000026U)
    225 
    226 #define NVSIPL_PIXEL_ORDER_CRBC (0x00000027U)
    227 
    228 #define NVSIPL_PIXEL_ORDER_CBRC (0x00000028U)
    229 
    231 #define NVSIPL_PIXEL_ORDER_RCCC (0x00000029U)
    232 
    233 #define NVSIPL_PIXEL_ORDER_CCCR (0x0000002AU)
    234 
    235 #define NVSIPL_PIXEL_ORDER_CRCC (0x0000002BU)
    236 
    237 #define NVSIPL_PIXEL_ORDER_CCRC (0x0000002CU)
    238 
    240 #define NVSIPL_PIXEL_ORDER_CCCC (0x0000002DU)
    241 
    244 #define NVSIPL_PIXEL_ORDER_BGGI_RGGI (0x0000002EU)
    245 
    246 #define NVSIPL_PIXEL_ORDER_GBIG_GRIG (0x0000002FU)
    247 
    248 #define NVSIPL_PIXEL_ORDER_GIBG_GIRG (0x00000030U)
    249 
    250 #define NVSIPL_PIXEL_ORDER_IGGB_IGGR (0x00000031U)
    251 
    252 #define NVSIPL_PIXEL_ORDER_RGGI_BGGI (0x00000032U)
    253 
    254 #define NVSIPL_PIXEL_ORDER_GRIG_GBIG (0x00000033U)
    255 
    256 #define NVSIPL_PIXEL_ORDER_GIRG_GIBG (0x00000034U)
    257 
    258 #define NVSIPL_PIXEL_ORDER_IGGR_IGGB (0x00000035U)
    259 
    263 typedef struct {
    269 
    270 #ifdef __cplusplus
    271 } /* extern "C" */
    272 #endif /* __cplusplus */
    273 
    274 #endif /* NVSIPL_CAP_STRUCTS_H */
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_A
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_A
    Specifies CSI port A.
    Definition: NvSIPLCapStructs.h:37
    NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW8
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW8
    Specifies RAW 8.
    Definition: NvSIPLCapStructs.h:99
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_GH
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_GH
    Specifies CSI port GH.
    Definition: NvSIPLCapStructs.h:59
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_E
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_E
    Specifies CSI port E.
    Definition: NvSIPLCapStructs.h:49
    NVSIPL_CAP_INPUT_FORMAT_TYPE_RGB888
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_RGB888
    Specifies RGB.
    Definition: NvSIPLCapStructs.h:93
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_F
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_F
    Specifies CSI port F.
    Definition: NvSIPLCapStructs.h:51
    NVSIPL_BITS_PER_PIXEL_14
    @ NVSIPL_BITS_PER_PIXEL_14
    Specifies 14 bits per pixel.
    Definition: NvSIPLCapStructs.h:141
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_G
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_G
    Specifies CSI port G.
    Definition: NvSIPLCapStructs.h:55
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_A1
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_A1
    Specifies CSI port A with 1 lane.
    Definition: NvSIPLCapStructs.h:62
    NvSiplBitsPerPixel
    NvSiplBitsPerPixel
    Specifies bits per pixel.
    Definition: NvSIPLCapStructs.h:133
    NvSiplCapInputFormat::bitsPerPixel
    NvSiplBitsPerPixel bitsPerPixel
    Holds number of bits per pixel for NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_x input format types.
    Definition: NvSIPLCapStructs.h:267
    NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_8
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_8
    Specifies User defined 8 (0x37).
    Definition: NvSIPLCapStructs.h:125
    NvSiplCapInputFormat::inputFormatType
    NvSiplCapInputFormatType inputFormatType
    Holds capture input format type.
    Definition: NvSIPLCapStructs.h:265
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_D1
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_D1
    Specifies CSI port D with 1 lane.
    Definition: NvSIPLCapStructs.h:68
    NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV422_10
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV422_10
    Specifies YUV 4:2:2 10 bits.
    Definition: NvSIPLCapStructs.h:88
    NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_7
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_7
    Specifies User defined 7 (0x36).
    Definition: NvSIPLCapStructs.h:123
    NVSIPL_BITS_PER_PIXEL_10
    @ NVSIPL_BITS_PER_PIXEL_10
    Specifies 10 bits per pixel.
    Definition: NvSIPLCapStructs.h:137
    NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW7
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW7
    Specifies RAW 7.
    Definition: NvSIPLCapStructs.h:97
    NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_6
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_6
    Specifies User defined 6 (0x35).
    Definition: NvSIPLCapStructs.h:121
    NvSiplCapInterfaceType
    NvSiplCapInterfaceType
    Specifies the capture interface type for the CSI interface.
    Definition: NvSIPLCapStructs.h:35
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_D
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_D
    Specifies CSI port D.
    Definition: NvSIPLCapStructs.h:45
    NvSiplCapCsiPhyMode
    NvSiplCapCsiPhyMode
    Specifies the CSI PHY mode.
    Definition: NvSIPLCapStructs.h:151
    NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_2
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_2
    Specifies User defined 2 (0x31).
    Definition: NvSIPLCapStructs.h:113
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_H
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_H
    Specifies CSI port H.
    Definition: NvSIPLCapStructs.h:57
    NvSiplCapInputFormat
    Holds the capture input format.
    Definition: NvSIPLCapStructs.h:263
    NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV444
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV444
    Specifies YUV 4:4:4.
    Definition: NvSIPLCapStructs.h:91
    NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW16
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW16
    Specifies RAW 16.
    Definition: NvSIPLCapStructs.h:107
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_C
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_C
    Specifies CSI port C.
    Definition: NvSIPLCapStructs.h:43
    NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_5
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_5
    Specifies User defined 5 (0x34).
    Definition: NvSIPLCapStructs.h:119
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_G1
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_G1
    Specifies CSI port G with 1 lane.
    Definition: NvSIPLCapStructs.h:74
    NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_4
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_4
    Specifies User defined 4 (0x33).
    Definition: NvSIPLCapStructs.h:117
    NVSIPL_BITS_PER_PIXEL_16
    @ NVSIPL_BITS_PER_PIXEL_16
    Specifies 16 bits per pixel.
    Definition: NvSIPLCapStructs.h:143
    NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV422
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV422
    Specifies YUV 4:2:2 8 bits.
    Definition: NvSIPLCapStructs.h:86
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_H1
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_H1
    Specifies CSI port H with 1 lane.
    Definition: NvSIPLCapStructs.h:76
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_C1
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_C1
    Specifies CSI port C with 1 lane.
    Definition: NvSIPLCapStructs.h:66
    NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW10
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW10
    Specifies RAW 10.
    Definition: NvSIPLCapStructs.h:101
    NVSIPL_CAP_CSI_INTERFACE_TYPE_MAX
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_MAX
    Definition: NvSIPLCapStructs.h:78
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_B1
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_B1
    Specifies CSI port B with 1 lane.
    Definition: NvSIPLCapStructs.h:64
    NvSiplCapInputFormatType
    NvSiplCapInputFormatType
    Specifies the capture input format type.
    Definition: NvSIPLCapStructs.h:84
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_EF
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_EF
    Specifies CSI port EF.
    Definition: NvSIPLCapStructs.h:53
    NVSIPL_BITS_PER_PIXEL_20
    @ NVSIPL_BITS_PER_PIXEL_20
    Specifies 20 bits per pixel.
    Definition: NvSIPLCapStructs.h:145
    NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW14
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW14
    Specifies RAW 14.
    Definition: NvSIPLCapStructs.h:105
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_E1
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_E1
    Specifies CSI port E with 1 lane.
    Definition: NvSIPLCapStructs.h:70
    NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW6
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW6
    Specifies RAW 6.
    Definition: NvSIPLCapStructs.h:95
    NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW20
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW20
    Specifies RAW 20.
    Definition: NvSIPLCapStructs.h:109
    NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_3
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_3
    Specifies User defined 3 (0x32).
    Definition: NvSIPLCapStructs.h:115
    NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_1
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_1
    Specifies User defined 1 (0x30).
    Definition: NvSIPLCapStructs.h:111
    NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW12
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW12
    Specifies RAW 12.
    Definition: NvSIPLCapStructs.h:103
    NVSIPL_CAP_CSI_CPHY_MODE
    @ NVSIPL_CAP_CSI_CPHY_MODE
    Specifies that CSI is in CPHY mode.
    Definition: NvSIPLCapStructs.h:155
    NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW12RJ
    @ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW12RJ
    Specifies RAW 12 Right Justified.
    Definition: NvSIPLCapStructs.h:127
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_B
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_B
    Specifies CSI port B.
    Definition: NvSIPLCapStructs.h:39
    NVSIPL_BITS_PER_PIXEL_8
    @ NVSIPL_BITS_PER_PIXEL_8
    Specifies 8 bits per pixel.
    Definition: NvSIPLCapStructs.h:135
    NVSIPL_BITS_PER_PIXEL_12
    @ NVSIPL_BITS_PER_PIXEL_12
    Specifies 12 bits per pixel.
    Definition: NvSIPLCapStructs.h:139
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_CD
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_CD
    Specifies CSI port CD.
    Definition: NvSIPLCapStructs.h:47
    NVSIPL_CAP_CSI_DPHY_MODE
    @ NVSIPL_CAP_CSI_DPHY_MODE
    Specifies that CSI is in DPHY mode.
    Definition: NvSIPLCapStructs.h:153
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_F1
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_F1
    Specifies CSI port F with 1 lane.
    Definition: NvSIPLCapStructs.h:72
    NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_AB
    @ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_AB
    Specifies CSI port AB.
    Definition: NvSIPLCapStructs.h:41
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