OSI Core EST structure.
Definition at line 133 of file nvethernetrm_export.h.
Data Fields | |
| nveu32_t | en_dis |
| enable/disable More... | |
| nveu32_t | btr [2] |
| 64 bit base time register if both values are 0, take ptp time to avoid BTRE index 0 for nsec, index 1 for sec More... | |
| nveu32_t | btr_offset [2] |
| 64 bit base time offset index 0 for nsec, index 1 for sec More... | |
| nveu32_t | ctr [2] |
| 40 bit cycle time register, index 0 for nsec, index 1 for sec More... | |
| nveu32_t | ter |
| Configured Time Interval width + 7 bit extension register. More... | |
| nveu32_t | llr |
| size of the gate control list More... | |
| nveu32_t | gcl [OSI_GCL_SIZE_256] |
| data array 8 bit gate op + 24 execution time MGBE HW support GCL depth 256 More... | |
| nveu32_t osi_est_config::btr[2] |
64 bit base time register if both values are 0, take ptp time to avoid BTRE index 0 for nsec, index 1 for sec
Definition at line 140 of file nvethernetrm_export.h.
| nveu32_t osi_est_config::btr_offset[2] |
64 bit base time offset index 0 for nsec, index 1 for sec
Definition at line 142 of file nvethernetrm_export.h.
| nveu32_t osi_est_config::ctr[2] |
40 bit cycle time register, index 0 for nsec, index 1 for sec
Definition at line 144 of file nvethernetrm_export.h.
| nveu32_t osi_est_config::en_dis |
enable/disable
Definition at line 135 of file nvethernetrm_export.h.
| nveu32_t osi_est_config::gcl[OSI_GCL_SIZE_256] |
data array 8 bit gate op + 24 execution time MGBE HW support GCL depth 256
Definition at line 151 of file nvethernetrm_export.h.
| nveu32_t osi_est_config::llr |
size of the gate control list
Definition at line 148 of file nvethernetrm_export.h.
| nveu32_t osi_est_config::ter |
Configured Time Interval width + 7 bit extension register.
Definition at line 146 of file nvethernetrm_export.h.
