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NVIDIA DRIVE OS Linux SDK API Reference
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6.0.4 Release
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17 #ifndef NVM_TENSORMETADATA_H
18 #define NVM_TENSORMETADATA_H
41 #define NVMEDIA_TENSOR_MAX_DIMENSIONS (8u)
45 #define NVM_TENSOR_ATTR_DIMENSION_ORDER_NHWC (0x00000001u)
47 #define NVM_TENSOR_ATTR_DIMENSION_ORDER_NCHW (0x00000002u)
49 #define NVM_TENSOR_ATTR_DIMENSION_ORDER_NCxHWx (0x00000003u)
51 #if (NV_IS_SAFETY == 0)
53 #define NVM_TENSOR_ATTR_DATA_TYPE_UINT (0x00000001u)
57 #define NVM_TENSOR_ATTR_DATA_TYPE_INT (0x00000002u)
59 #define NVM_TENSOR_ATTR_DATA_TYPE_FLOAT (0x00000003u)
61 #if (NV_IS_SAFETY == 0)
63 #define NVM_TENSOR_ATTR_BITS_PER_ELEMENT_64 (64U)
65 #define NVM_TENSOR_ATTR_BITS_PER_ELEMENT_32 (32U)
69 #define NVM_TENSOR_ATTR_BITS_PER_ELEMENT_16 (16U)
71 #define NVM_TENSOR_ATTR_BITS_PER_ELEMENT_8 (8U)
73 #if (NV_IS_SAFETY == 0)
108 #define NVM_TENSOR_NHWC_E_STRIDE_INDEX 0U
117 #define NVM_TENSOR_NHWC_C_STRIDE_INDEX NVM_TENSOR_NHWC_E_STRIDE_INDEX
126 #define NVM_TENSOR_NHWC_W_STRIDE_INDEX 1U
135 #define NVM_TENSOR_NHWC_H_STRIDE_INDEX 2U
144 #define NVM_TENSOR_NHWC_N_STRIDE_INDEX 3U
171 #define NVM_TENSOR_NCHW_E_STRIDE_INDEX 0U
181 #define NVM_TENSOR_NCHW_W_STRIDE_INDEX NVM_TENSOR_NCHW_E_STRIDE_INDEX
190 #define NVM_TENSOR_NCHW_H_STRIDE_INDEX 1U
198 #define NVM_TENSOR_NCHW_C_STRIDE_INDEX 2U
207 #define NVM_TENSOR_NCHW_N_STRIDE_INDEX 3U
236 #define NVM_TENSOR_NCxHWx_E_STRIDE_INDEX 0U
246 #define NVM_TENSOR_NCxHWx_X_STRIDE_INDEX NVM_TENSOR_NCxHWx_E_STRIDE_INDEX
255 #define NVM_TENSOR_NCxHWx_W_STRIDE_INDEX 1U
264 #define NVM_TENSOR_NCxHWx_H_STRIDE_INDEX 2U
273 #define NVM_TENSOR_NCxHWx_Cx_STRIDE_INDEX 3U
282 #define NVM_TENSOR_NCxHWx_N_STRIDE_INDEX 4U
299 #define NVM_TENSOR_NHWC_C_DIMSZ_INDEX 0U
307 #define NVM_TENSOR_NHWC_W_DIMSZ_INDEX 1U
315 #define NVM_TENSOR_NHWC_H_DIMSZ_INDEX 2U
323 #define NVM_TENSOR_NHWC_N_DIMSZ_INDEX 3U
340 #define NVM_TENSOR_NCHW_W_DIMSZ_INDEX 0U
348 #define NVM_TENSOR_NCHW_H_DIMSZ_INDEX 1U
356 #define NVM_TENSOR_NCHW_C_DIMSZ_INDEX 2U
364 #define NVM_TENSOR_NCHW_N_DIMSZ_INDEX 3U
381 #define NVM_TENSOR_NCxHWx_x_DIMSZ_INDEX 0U
389 #define NVM_TENSOR_NCxHWx_W_DIMSZ_INDEX 1U
397 #define NVM_TENSOR_NCxHWx_H_DIMSZ_INDEX 2U
405 #define NVM_TENSOR_NCxHWx_Cx_DIMSZ_INDEX 3U
413 #define NVM_TENSOR_NCxHWx_N_DIMSZ_INDEX 4U
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